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9-bit CPU: Register file, ALU, and fetch unit

$30-250 USD

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Publicerad över fyra år sedan

$30-250 USD

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In this lab assignment, you will design the top level, register file, control decoder, ALU (arithmetic logic unit), data memory, muxes (signal routing switches), lookup tables, and fetch unit (program counter plus instruction ROM) for your CPU. For this and future designs, we want the highest level of your design to be a schematic and [System]Verilog code... if you are intersted in let me know . There is instruction that I will shrae with you.
Project ID: 21938846

Om projektet

7 anbud
Distansprojekt
Senaste aktivitet fem år sedan

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Hello! Please check my reviews and profile to know more about me and my work. I’ve helped many students in completing there computer architecture courses and should be able to help you out as well. Please do contact to discuss further! Thank you!
$100 USD Om 7 dagar
4,9 (87 omdömen)
6,3
6,3
7 frilansar lägger i genomsnitt anbud på $136 USD för detta uppdrag
Använd avatar
Dear sir I have more than 10 years experience in digital design using verilog and system verilog please check my profile also please message me so that we can discuss
$111 USD Om 1 dag
4,9 (513 omdömen)
8,2
8,2
Använd avatar
Hi, i am electrical engineer, i can design the ALU using verilog HDL,....................................
$150 USD Om 3 dagar
4,8 (270 omdömen)
7,3
7,3
Använd avatar
Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG and about 200 JOB completed. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done with very high difficult project in backend design in FPGA by correct timinig closure for FPGA with 400 Mhz in Virtex Ultrascale+ in some field like mining coin (bitcore, and lyra2rev3) Second, with your requirements, I have finished atlest 10 projects related to CPU with ALU, decoder, Datamemory, instruction memory...All of them run very smooth. Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you.
$200 USD Om 3 dagar
4,9 (94 omdömen)
6,9
6,9
Använd avatar
I have well experienced in doing such kind of jobs.......................................................................................................
$50 USD Om 3 dagar
4,7 (67 omdömen)
6,1
6,1
Använd avatar
Hi I have been working on verilog-vhdl and xilinx and altera(intel) FPGAs by more than 6 year. lets discuss the requirements, the price mentioned is negotiable according to your exact requirements. Thanks
$250 USD Om 7 dagar
4,8 (33 omdömen)
6,1
6,1
Använd avatar
I have 10 years of experience in design and verification using Verilog. Please message me. Best regards.
$88 USD Om 3 dagar
5,0 (8 omdömen)
4,2
4,2

Om kunden

Flagga för UNITED STATES
La Jolla, United States
5,0
1
Medlem sedan dec. 1, 2016

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