Vhdl coding for axi interface interrupt controller

The project is about an AMBA AXI interface for vector interrupt controller. There should be a efficient medium for transfer of data between the controller and processor ie, between master and slave through AXI interface. The coding language is VHDL(Very High Speed Integrated Circuit Hardware Description Language) and simulation should be done in Xilinx and the simulation and synthetization results should be shown. There should be a project report comprising the work done and that may include block diagram, comparison of earlier works, future scope, simulation results and discussions.