Virtual Memory Management Simulator Project!

You are going to write a program that translates logical addresses given to physical addresses for a virtual address space of 216 = 65536 bytes. Your program will read from a text file containing logical addresses and, using a TLB as well as a page table, will translate each logical address to its corresponding physical address, and output the value of the byte stored at the translated physical address. The program will read a file converting several 16-bit integer numbers that represent logical addresses. These 16 bits are divided into (1) an 8-bit page number, and (2) 8-bit page offset. Hence, there are 28 = 256 entries in the page table, and the page/frame size of the system is also 28 = 256. The size of the physical address space is equal to the size of the logical address space, i.e., 216 = 65536 bytes. Consequently, the number of frames is also 28 = 256. Your program need only be concerned with reading logical addresses, translating them to their corresponding physical addresses, and outputting the byte stored at the physical address obtained. You do not need to support writing to the logical address space. Your program will translate logical to physical addresses using a TLB and page table. First, the page number is extracted from the logical address, and the TLB is consulted. In the case of a TLB-hit, the frame number is obtained from TLB. In the case of a TLB-miss, the page table must be consulted. In the latter case, either the frame number is obtained from the page table or a page fault occurs. A visual representation of the address translation process is shown in Figure 1. You need to design and code appropriate data structures for TLB, page table and main memory of the system. Your program should implement demand-paging. The secondary backing storage is represented by a file named [login to view URL], a binary file of size 65536 bytes, and it will be provided to you. When a page fault occurs, you will read in a 256-byte page from the file [login to view URL] and store in an available page frame in physical memory. Once the frame is stored, first the page table and then the TLB should be updated, and any subsequent accesses to that page will be resolved by either the TLB or the page table. You should treat [login to view URL] as a random access file so that you can randomly seek certain positions of the file for reading. It is suggested for you to use standard C library functions for performing I/O, including fopen(), fread(), fseek(), and fclose(). Since the size of the physical memory is the same as the size of the virtual address space, i.e., 65536 bytes, you do not need to be concerned about page replacements during a page fault, because each physical frame stored on BACKING_STORE has a corresponding place in the physical memory. On the other hand, since TLB has only 16 entries, you will need to use a replacement strategy when you update a full TLB. You should select the entry to be replaced via FIFO replacement strategy. A test file called [login to view URL] is provided which contains integer values representing logical addresses ranging from 0 to 65535. Your program will open this file, read each logical address and translate it to its corresponding physical address, and then output the value of the signed byte stored at that physical address. In C, char data type occupies one byte of storage, so you can use char values to represent physical memory contents. After completion, your program is to report the following statistics: 1. Page-fault rate: The percentage of address references that resulted in page faults. 2. TLB-hit rate: The percentage of address references that were resolved in the TLB. 3- In-line comments within your codes, giving enough information on your implementation details